1. Field of the Invention
Exemplary embodiments of the present invention relate to an output waveform synthesizer using phase interpolators and an on-chip eye opening monitoring (EOM) circuit for a low-power transmitter.
2. Discussion of the Background
FIG. 1 shows a simplified circuit schematic diagram of a conventional multiphase multiplexer, and FIG. 2 shows a simplified timing diagram of a conventional multiphase multiplexer. The outputs are evaluated when two neighboring clock phases overlap. However, the deterministic jitter (DJ) caused by phase mismatch dominates the overall jitter performance of a multiphase multiplexer. FIG. 3 show an output eye diagram with phase mismatch and duty cycle distortion. The DJ shown in FIG. 3 eventually degrades the timing margin at the receiver. The phase mismatch is caused by inherent device mismatch and capacitance mismatch in a layout. The output eye diagram shows a result of Monte-Carlo simulation as probability distributions of a process parameter for each of two hundred samples and shows different eye diagrams for the probability distributions are caused by the phase mismatch or the duty cycle variation.